What Is Forenyx AI

Forenyx AI is an AI agent platform for digital IC verification. It assists verification engineers with test planning, UVM environment build-out, testcase generation, simulation execution and failure debugging.

---

Core Capabilities

The platform provides standardized skills across the verification lifecycle:

1. Requirement and architecture audit — parses specifications (Spec/PRD) and statically audits architectural defects, missing boundary conditions and protocol state machine logic.
2. Test plan extraction — extracts the feature tree automatically and produces a structured test plan (uvm_testplan.md) covering CSR access, scoreboard comparison and assertion annotations.
3. UVM environment build-out — generates UVM scaffolding along with physical/virtual interface connections, driver and monitor sampling logic, the configuration database and the scoreboard comparison model.
4. SVA assertion generation — parses the RTL signal structure and produces non-intrusive SystemVerilog assertion modules attached through bind.
5. Testcase generation and simulation — produces UVM-compliant test classes and virtual sequences, then drives EDA tools (VCS/Verdi/ModelSim) through compilation and simulation runs.
6. Failure debugging and RCA — parses simulation log (sim.log) stack traces and FSDB waveform slices to analyze the root cause of a UVM_ERROR or a triggered assertion.

---

End-to-End Topology

---

How Modules and Skills Cooperate

The platform consists of 24 skills, each focused on a specific verification task. They can be invoked through a high-level orchestration skill (-auto) or individually from the command line, and they cooperate through a uniform input/output contract.